1. Field of the Invention
The present invention relates to a solid-state image pick-up device used for a digital camera, etc., as an image pick-up device for inputting a picture.
2. Related Background Art
In recent years, there has been a rapidly increasing demand on a solid-state image pick-up device used mainly for a digital still camera and a video camcorder, as an image pick-up device for inputting a picture.
As such solid-state image pick-up device, CCD (Charge Coupled Device) and MOS type sensors are used. Although the former, which has a high sensitivity and a low noise level in comparison with the latter, has been widely used as an image pick-up device of high picture quality, the former has disadvantages such as a large power consumption, a high drive voltage, a high cost due to the fact that the ordinary semiconductor manufacturing process cannot be applied, and a difficulty in integrating peripheral circuits such as a drive circuit, as a result of which the MOS type solid-state image pick-up device, which is capable of preventing the above described disadvantages, is expected to be employed in the application for portable devices for which new demands are expected.
The CMOS solid-state image pick-up device, which is formed by the CMOS process, has been put in practical use as a representative of the MOS type solid-state image pick-up devices. A pixel circuit of the CMOS solid-state image pick-up device is shown in FIG. 1, a plane layout of the pixel is shown in FIG. 2, and a cross-sectional structure of the pixel is shown in FIG. 3.
In FIG. 1, reference numeral 1 denotes a photodiode, 2 denoting a transfer MOS transistor for transferring a charge of the photodiode, 3 denoting a floating diffusion for temporarily storing the transferred charge, 4 denoting a reset MOS transistor for resetting the floating diffusion and the photodiode, 5 denoting a selection MOS transistor for selecting an arbitrary one line in an array, 6 denoting a source follower MOS transistor for converting the charge of the floating diffusion into a voltage and for amplifying the voltage by a source follower amplifier, 7 denoting a read line, which is common to a column, for reading out pixel voltage signals, and 8 denoting a constant current source for making a constant current flow in the read line.
A brief description of the operation of the circuit will be provided below. Incident light is converted into an electric charge by the photodiode 1, and the charge is stored in the floating diffusion 3 by the transfer MOS transistor 2. Since the floating diffusion 3 and the photodiode 1 are reset to a constant potential by turning off the reset MOS transistor 4 and the transfer MOS transistor 2 beforehand, the potential of the floating diffusion 3 is changed in accordance with the charge generated by the incident light. The potential of the floating diffusion 3 is amplified by the source follower MOS transistor 6 and is outputted to the read line 7. The pixel is chosen by turning off the selection MOS transistor 5. An output circuit (not shown) performs a differential operation between the reset potential of the floating diffusion 3 and the potential after the light signal is stored, so as to detect the light signal component.
FIG. 2 shows an example of a layout of the pixel circuit shown in FIG. 1. Reference numeral 10 denotes an active area in which a photodiode is formed, and 11 denotes an active area in which a selection MOS transistor and a source follower transistor are formed. Reference numeral 20 denotes an area of a transfer MOS transistor, and 21 denotes a gate line of the transfer MOS transistor. An area 30 surrounded by a broken line indicates a portion formed of a PN junction of semiconductor in a floating diffusion. Reference numeral 31 also denotes a contact for leading out an electrode from the floating diffusion, 32 denoting a metallic electrode for leading out the floating diffusion, 33 denoting a contact for connecting the metallic electrode 32 to a polysilicon, and 34 denoting a polysilicon electrode. Reference numeral 40 denotes a reset MOS transistor area and 41 denoting a contact for connection with a reset power supply. Reference numeral 50 denotes a gate area of the selection MOS transistor, 51 denoting a contact for connecting with a VDD power supply, 60 denoting an area of a source follower MOS transistor, of which gate electrode is formed by the polysilicon 34 electrically connected with the floating diffusion. Reference numeral 70 denotes an output line configured by a metal electrode. Reference numeral 71 denotes a contact for connecting the output line 70 with the main electrode of the source follower MOS transistor 60.
FIG. 3 is a cross sectional view taken along the line 3-3 in the layout shown in FIG. 2. Reference numeral 301 denotes an n-type silicon substrate, 302a denoting a P-type well and 302b denoting a P-type embedded layer, 303a denoting a gate oxide film of the MOS transistor, 303b denoting a thin oxide film on the light receiving section, 304 denoting a gate electrode of the transfer MOS transistor, 305 denoting an N-type cathode of the photodiode 1, 306 denoting a surface P-type region for forming the photodiode into an embedded structure, 307a denoting an LOCOS oxide film for element isolation, 307b denoting a P-type channel stop layer, 308 denoting a N-type high concentration region which forms the floating diffusion 3 and which is also the drain region of the transfer MOS transistor 2, 309 denoting a silicon oxide film for insulating the gate electrode from a metal first layer, 320 denoting a contact plug, 321 denoting the metal first layer, 322 denoting an interlayer insulating film for insulating the metal first layer from a metal second layer, 323 denoting the metal second layer, 324 denoting an interlayer insulating film for insulating the metal second layer from a metal third layer, 325 denoting the metal third layer and 326 denoting a passivation film. In addition, in a color photoelectric converter, a color filter layer (not shown) and further a micro lens for improving the sensitivity are formed on the upper layer of the passivation film 326.
Light incident from the surface passes through an aperture without the metal third layer to enter into the photodiode. The light is absorbed in the N-type anode 305 of the photodiode or in the P-type well 302a to generate electron-hole pairs. Among the electron-hole pairs, electrons are stored in the N-type anode region.
However, the above described conventional CMOS solid-state image pick-up device has a disadvantage that signal electrons generated by the incident light is mixed into the floating diffusion 3 to cause the output voltage to fluctuate. As shown in FIG. 3, among electron-hole pairs 330b generated below the gate of the transfer MOS transistor by an obliquely incident light beam 330a, the electrons are attracted from the N-type cathode 305 of the photodiode to the N type high concentration layer 308 constituting the floating diffusion. Moreover, light 331a incident on the gate electrode 304 of the transfer MOS transistor, for example, is repeatedly reflected as shown in FIG. 3 to generate electron-hole pairs 331b immediately below the N type high concentration layer 308. Among the electron-hole pairs, the electrons are attracted to the N type high concentration layer. When the first layer metal 320 in FIG. 3 is extended to the aperture side to improve the shading characteristic, the electrostatic capacity of the floating diffusion section is increased so as to reduce the charge conversion coefficient, resulting in a problem of degrading an S/N.
As described above, the electrons directly captured in the floating diffusion without passing through the photodiode generate aliasing to cause problems in a solid-state image pick-up device, such as increasing noise, reducing a dynamic range, increasing output and shading in the dark state. For this reason, improving the shading characteristic of the floating diffusion has been a problem to be solved in the conventional CMOS solid-state image pick-up device.
In the CCD type solid-state image pick-up device, a source follower amplifier, in which the floating diffusion is used at the last stage of the readout circuit, is also generally used. For example, an example is disclosed in Japanese Patent Application Laid-Open No. H03-116840, in which leading-out of electrodes for the source follower amplifier is effected with a polysilicon. In this example, however, improvement in the shading characteristic is not described, and also the fact that electrons generated in the silicon flow into the floating diffusion, as described in the above example of the prior art, is not taken into account. Moreover, in the CCD-type solid-state image pick-up device, since only one floating diffusion amplifier is provided on the post-stage of a horizontal CCD and is located apart from the pixel section, the layout can be performed without being limited by the pixel area, and hence a special device is not needed.
On the other hand, in the CMOS solid-state image pick-up device, there are conditions that the photodiode is arranged close to the floating diffusion because the floating diffusion is present in each pixel, and that a slight gap must be inevitably provided for the metallic electrodes serving as the light shield because the metallic electrodes are also used as wiring of the circuit, etc., the conditions being different from those in the CCD-type solid-state image pick-up device, as a result of which a new structural design is needed.